At Jabil we strive to make ANYTHING POSSIBLE and EVERYTHING BETTER. With over 260,000 diverse, talented and dedicated employees across 100 locations in 30 countries, our vision is to be the most technologically advanced and trusted manufacturing solutions provider. We combine an unmatched breadth and depth of end-market experience, technical and design capabilities, manufacturing know-how, supply chain insights and global product management expertise to enable success for the world’s leading brands. We are driven by a common purpose to make a positive impact for each other, our communities, and the environment.

JOB SUMMARY

The Principal FPGA verification engineer will architect and develop UVM based verification environments for ORAN compliant 4G and 5G radio products. This will include developing and documenting end-to-end verification test-benches, creating test plans, and executing test cases. The candidate will also perform hardware validation and debug on hardware platforms.

The candidate should have a solid background in UVM and assertion-based verification using System Verilog and demonstrated ability to write, test and debug code independently. Expertise with Xilinx Vivado simulator and Questa is highly desired. ***Note, this is an On-site position at our Warren, NJ location, with option of a Hybrid work situation once on board with our team in Warren.***

ESSENTIAL DUTIES AND RESPONSIBILITIES

• Proficiency in System Verilog, Verilog, UVM, and assertion-based verification
• Expert knowledge of Xilinx Vivado and Questa simulator
• Lead verification planning from specifications and system requirements
• Create, execute, and track detailed verification test plans
• Develop automated regression test suites
• Create and enhance constrained-random verification environments
• Develop scalable verification automation environment in Git
• Work with RTL designers to identify verification goals and define test strategies
• Facilitate testing of RTL against reference MATLAB and C models
• Perform Failure Analysis and collect and report coverage matrices
• Support Radio Head testing by collaborate with members of Hardware, Software, System Test, and Manufacturing teams
• Experience with protocol compliance verification, functional/code coverage evaluation.
• Experience with wireless communication systems and digital signal processing
• Some experience with FPGA design/synthesis, constraints, and timing closure
• Familiar with Linux, Embedded C programming, scripting languages (TCL, Python, Bash, etc.)
• Understanding of SoC Processor Subsystem to support software developers
• Mentor junior verification engineers

Experience with the following is a plus:

• QEMU/C based co-simulation in Vivado
• ORAN specification
• MATLAB

JOB QUALIFICATIONS-
EDUCATION & EXPERIENCE REQUIREMENTS

· Masters degree in Engineering from an accredited four-year college or university
· Minimum 10+ years of related experience (3+ years’ experience with UVM preferred)
· Minimum of 2 years experience as a Lead Engineer

BE AWARE OF FRAUD: When applying for a job at Jabil you will be contacted via correspondence through our official job portal with a jabil.com e-mail address; direct phone call from a member of the Jabil team; or direct e-mail with a jabil.com e-mail address. Jabil does not request payments for interviews or at any other point during the hiring process. Jabil will not ask for your personal identifying information such as a social security number, birth certificate, financial institution, driver’s license number or passport information over the phone or via e-mail. If you believe you are a victim of identity theft, contact the Federal Bureau of Investigations internet crime hotline (www.ic3.gov), the Federal Trade Commission identity theft hotline (www.identitytheft.gov) and/or your local police department. Any scam job listings should be reported to whatever website it was posted in.

The pay range for this role is $97,962 - $186,034. Job-related, non-discriminatory factors used to determine the actual offered rate include qualifications and experience, geographic location, education, external market data, and consideration of internal equity.

As part of the total rewards package, this position is eligible for a short-term incentive based on performance. In addition, Jabil offers benefits to enhance your health, wealth, and resilient self. These include medical, dental, and vision insurance plans; paid time off accruing at a rate of 3.07 hours during your first year of employment; 4 weeks of paid parental leave; in 2023, 10 company-paid holidays (8 fixed holidays and 2 optional floating holidays), subject to change yearly; 401(k) retirement plan; and employee stock purchase plan.

Jabil, including its subsidiaries, is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, national origin, sex, sexual orientation, gender identity, age, disability, genetic information, veteran status, or any other characteristic protected by law.